Role: Analog Layout Engineer -- Hardware Design Engineer 3

Location: Hyderabad

Key Responsibilities/Preferred Experience:

The role involves execution in the field of full custom layouts in cutting edge technology nodes. It will require a good layout electrical parameter knowledge along with quick learning capabilities.

Candidate should be able to handle sub cells/leaf cells that are needed to build IP/macro using CAD tools

Chip level integration, physical verification and electricals’ closure

Candidate will be exposed/experienced to various other fields of custom layout 

Custom layout expertise in lower technology

Digital, Analog and mixed signal layout.

Good understanding of reliability concepts

Good understating of layout electrical parameters and closure

Comments for Suppliers:           This is for Analog Layout Engineers having exp in custom block layout like PLL, Bandgap, ADC, DAC etc. and Virtuoso, Calibre, DRC, LVS

Requires TSMC 3nm and 2nm 3-way NDA in place.