Senior Engineer – CPU Design Verification

Key Responsibilities:

Debug and triage failures from simulation and emulation environments at core/subsystem level, covering:

Frontend (Fetch/Decode)

Execution & Load/Store

Floating Point

Cache hierarchy

Analyze and debug test cases written in assembly and C++-based verification environments.

Develop and enhance automated debug and triage tools using scripting languages (Perl/Python/Ruby) and C++.

Contribute to stimulus development:

Directed and random test creation

Improve regression efficiency and bug detection

Work on core debug infrastructure and improve debug turnaround time.

Collaborate with cross-functional teams to identify coverage gaps, improve test quality, and address bug escape scenarios.

Identify opportunities for automation and process improvements.

Support post-silicon debug activities as needed.

Explore and apply ML/AI-based techniques to improve debug and verification efficiency (good to have).

Required Skills & Qualifications:

3–5 years of experience in ASIC/SoC Design Verification.

Good understanding of:

Computer Architecture (x86/ARM basics)

Digital Design fundamentals

RTL concepts

Familiarity with verification methodologies:

C++/SystemVerilog

UVM/OVM (preferred)

Strong debugging and analytical skills.

Exposure to simulation and/or emulation environments.

Scripting knowledge (Python/Perl/Shell/Ruby) preferred.

Preferred Qualifications:

Exposure to processor subsystem verification (CPU core, caches, pipelines).

Understanding of microarchitecture concepts (pipeline stages, memory hierarchy, execution units).

Familiarity with assembly-level programming/debug.

Awareness or exposure to ML/AI techniques in verification (nice to have).

Soft Skills:

Strong problem-solving mindset and attention to detail.

Good communication and collaboration skills.

Ability to work in a fast-paced, dynamic environment.

Self-driven learner with a passion to explore and innovate.

Team-oriented mindset (“We before Me”).

Education:

B.E./B.Tech or M.E./M.Tech in Electrical / Electronics / Computer Engineering or related field.

581-1 ASIC/RTL Design Engineer 2